This project will develop algorithms for low power FPGA and microcontrollers for machine learning of various categories of sound. Algorithm training will be done on traditional computers with the trained algorithm implemented on an FPGA and microcontroller. The goal is to minimize power consumption, memory, logic units, multipliers, floating point operations, etc. while maintaining accuracy.
Additional Information: beginning Spring 2020, 10 hours/week, FURI-eligible
Student Qualifications: Student must know Verilog and be comfortable programming micro-controllers. The student should have an interest in learning and optimizing machine learning algorithms. US citizenship required. Please submit resume and transcripts.
Lab website: https://isearch.asu.edu/profile/4550
Professor: David Allee (firstname.lastname@example.org)